With recent advancements in imaging technologies, there is an increasing demand for on-chip codecs in image capturing and display devices that can handle compression and storage of different images or video in wide variety of image resolutions (e.g., low to high resolution images/video). Currently, an image or video may be subjected to multiple coding techniques, for example, transform coding, residual prediction, quantization, entropy coding, and the like, to achieve a desired compression. Typically, after the entropy coding, there may be still un-coded bits available in bit-planes within a bit budget of an encoded image block. In certain scenarios, some of the un-coded bits may be refined by allocating refinement bits in a fixed refinement order for each encoded image block. In such scenarios, the allocation of refinement bits in the fixed refinement order may result in coding artifacts and/or adversely impact quality of encoded image. This may further result in compression inefficiency and sub-optimal memory usage, especially in on-chip codes where it is desirable to achieve an area efficiency with respect to throughput while minimizing an on-chip memory usage.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one skill in the art, through comparison of described systems with some aspects of the present disclosure, as set forth in the remainder of the present application and with reference to the drawings.